Over the last few decades, the semiconductor industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices, and the most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines. One silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor, for example. Types of MOS transistors include NMOS, PMOS and CMOS transistors. The MOS transistor is one of the basic building blocks of most modern electronic circuits.
Typically, semiconductor devices are comprised of millions of transistors formed above a semiconducting substrate. The semiconducting substrate or wafer includes an insulation layer, e.g., a buried oxide layer, above a semiconducting substrate of silicon. Typically, the insulation layer is formed by an oxidation process. Then, a process layer, such as poly-silicon, poly-SiGe, and amorphous silicon, is formed above the insulation layer. The process layer may be formed by a variety of processes, e.g., by a chemical vapor deposition (“CVD”) process.
Shallow trench isolation regions are provided, e.g., by etching, to create electrically isolated islands or bodies in the process layer. The semiconductor devices are then formed on the bodies of the process layer. The transistor, for example, has a doped polycrystalline silicon (polysilicon) gate electrode formed above a gate insulation layer, formed on the process layer. The gate electrode and the gate insulation layer are separated from doped source/drain regions formed in the process layer by a dielectric sidewall spacer. The source/drain regions for the transistor may be formed by performing one or more ion implantation processes to introduce dopant atoms, e.g. arsenic or phosphorous for NMOS devices, boron for PMOS devices, into the process layer. Additionally, a typical semiconductor device is comprised of a plurality of conductive interconnections, such as conductive lines and conductive contacts or vias, positioned in multiple layers of insulating material formed above the process layer.
In order to reduce floating body effects of the semiconductor devices, impurities are introduced into the process layer near at the interface of the insulation layer. This process is referred to as minority carrier lifetime killing. The impurities can comprise a heavy ion, such as argon ions, which are implanted deeply within the process layer. In ion implantation, an ion implanter is used to generate a beam of high-energy ions, which are injected into the process layer of the substrate. Ion implantation is widely used in semiconductor fabrication.
Ion implantation, however, has some disadvantages. In particular, the ion implantation process damages the lattice structure of the process layer, so that electron mobility within the semiconductor devices is degraded. One method of restoring the electron mobility is by rearranging the lattice structure through a high temperature annealing process. By controlling the temperature and process time, impurities are electrically activated, and the mobility of the device is restored. Thus, the damage of the lattice structure is mended. Yet, when ions are implanted with a very large energy, or very heavy ions are implanted, the damage to the lattice structure can be too serious to mend through an annealing process. Thus, implanting argon ions in order to reduce floating body effects can leave surface defects in the process material, which in turn can degrade electron mobility within the semiconductor devices etched in the process layer.
What is still desired, therefore, is a new and improved method for reducing floating body effects in a silicon-on-insulator (SOI) semiconductor device. Preferably, the new and improved method will not degrade mobility of the device.